Monday, February 29, 2016

8051 ANL Instruction

Logical AND

InstructionANL dest-byte,src-byte
FunctionLogical-AND for byte variables
DescriptionANL performs the bitwise logical-AND operation between the variables indicated and stores the results in the destination variable. No flags are affected.
The two operands allow six addressing mode combinations. When the destination is the Accumulator, the source can use register, direct, register-indirect, or immediate addressing; when the destination is a direct address, the source can be the Accumulator or immediate data.
Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins.
ExampleIf the Accumulator holds 0C3H (1100001lB), and register 0 holds 55H (01010101B), then the following instruction,
ANL A,R0
leaves 41H (01000001B) in the Accumulator.
When the destination is a directly addressed byte, this instruction clears combinations of bits in any RAM location or hardware register. The mask byte determining the pattern of bits to be cleared would either be a constant contained in the instruction or a value computed in the Accumulator at run-time. The following instruction,
ANL P1,#01110011B
clears bits 7, 3, and 2 of output port 1.
VariantsANL A,Rn
ANL A,direct address
ANL A,@Ri
ANL A,#immediate data
ANL direct address,A
ANL direct address, #immediate data

InstructionANL A,Rn
Bytes1
Cycles1
Encoding0 1 0 1 1 n n n
OperationA = A AND Rn
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleANL A, R4
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold

InstructionANL A,direct address
Bytes2
Cycles1
Encoding0 1 0 1 0 1 0 1 A7...A0
OperationA = A AND (direct address)
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleANL A, 40h
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold

InstructionANL A,@Ri
Bytes1
Cycles1
Encoding0 1 0 1 0 1 1 i
OperationA = A AND (Ri)
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleANL A, @R0
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold

InstructionANL A,#immediate data
Bytes2
Cycles1
Encoding0 1 0 1 0 1 0 0 D7...D0
OperationA = A AND immediate data
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleANL A, #3Fh
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold

InstructionANL direct address,A
Bytes2
Cycles1
Encoding0 1 0 1 0 0 1 0 A7...A0
Operation(direct address) = (direct address) AND A
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleANL 40h, A
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold

InstructionANL direct address, #immediate data
Bytes3
Cycles2
Encoding0 1 0 1 0 0 1 1 A7...A0 D7...D0
Operation(direct address) = (direct address) AND immediate data
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleANL 30h, #77h
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold

InstructionANL C,src-bit
FunctionLogical-AND for bit variables
DescriptionIf the Boolean value of the source bit is a logical 0, then ANL C clears the carry flag; otherwise, this instruction leaves the carry flag in its current state. A slash ( / ) preceding the operand in the assembly language indicates that the logical complement of the addressed bit is used as the source value, but the source bit itself is not affected. No other flags are affected.
Only direct addressing is allowed for the source operand.
ExampleSet the carry flag if, and only if, P1.0 = 1, ACC.7 = 1, and OV = 0:
MOV C,P1.0 ;LOAD CARRY WITH INPUT PIN STATE
ANL C,ACC.7 ;AND CARRY WITH ACCUM. BIT 7
ANL C,/OV ;AND WITH INVERSE OF OVERFLOW FLAG
VariantsANL C,bit
ANL C,/bit

InstructionANL C,bit
Bytes2
Cycles2
Encoding10000010 bit_address
OperationC = C AND (bit)
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleANL C, 22h
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold

InstructionANL C,/bit
Bytes2
Cycles2
Encoding1 0 1 1 0 0 0 0 bit_address
OperationC = C AND NOT (bit)
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleANL C, /22h
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold



Related topics:
8051 Logical Operation Instructions   |   8051 ORL Instruction   |   8051 XRL Instruction   |   8051 CLR Instruction   |   8051 CPL Instruction   |   8051 RL Instruction   |   8051 RR Instruction   |   8051 RLC Instruction   |   8051 RRC Instruction   |   8051 SWAP Instruction

List of topics: 8051

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