8051 ORL Instruction

Logical OR

Instruction	ORL dest-byte,src-byte
Function	Logical-OR for byte variables
Description	ORL performs the bitwise logical-OR operation between the indicated variables, storing the results in the destination byte. No flags are affected. The two operands allow six addressing mode combinations. When the destination is the Accumulator, the source can use register, direct, register-indirect, or immediate addressing; when the destination is a direct address, the source can be the Accumulator or immediate data. Note: When this instruction is used to modify an output port, the value used as the original port data is read from the output data latch, not the input pins.
Example	If the Accumulator holds 0C3H (11000011B) and R0 holds 55H (01010101B) then the following instruction, ORL A,R0 leaves the Accumulator holding the value 0D7H (1101011lB).When the destination is a directly addressed byte, the instruction can set combinations of bits in any RAM location or hardware register. The pattern of bits to be set is determined by a mask byte, which may be either a constant data value in the instruction or a variable computed in the Accumulator at run-time. The instruction, ORL P1,#00110010B sets bits 5, 4, and 1 of output Port 1.
Variants	ORL A,Rn ORL A,direct address ORL A,@Ri ORL A,#immediate data ORL direct address,A ORL direct address, #immediate data

Instruction	ORL A,Rn
Bytes	1
Cycles	1
Encoding	0 1 0 0 1 n n n
Operation	A = A OR Rn
Flags Affected	C AC F0 RS1 RS0 OV P
Example	ORL A, R4
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction	ORL A,direct address
Bytes	2
Cycles	1
Encoding	0 1 0 0 0 1 0 1 A7...A0
Operation	A = A OR (direct address)
Flags Affected	C AC F0 RS1 RS0 OV P
Example	ORL A, 40h
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction	ORL A,@Ri
Bytes	1
Cycles	1
Encoding	0 1 0 0 0 1 1 i
Operation	A = A OR (Ri)
Flags Affected	C AC F0 RS1 RS0 OV P
Example	ORL A, @R0
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction	ORL A,#immediate data
Bytes	2
Cycles	1
Encoding	0 1 0 0 0 1 0 0 D7...D0
Operation	A = A OR immediate data
Flags Affected	C AC F0 RS1 RS0 OV P
Example	ORL A, #3Fh
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction	ORL direct address,A
Bytes	2
Cycles	1
Encoding	0 1 0 0 0 0 1 0 A7...A0
Operation	(direct address) = (direct address) OR A
Flags Affected	C AC F0 RS1 RS0 OV P
Example	ORL 40h, A
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction	ORL direct address, #immediate data
Bytes	3
Cycles	2
Encoding	0 1 0 0 0 0 1 1 A7...A0 D7...D0
Operation	(direct address) = (direct address) OR immediate data
Flags Affected	C AC F0 RS1 RS0 OV P
Example	ORL 30h, #77h
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction	ORL C,src-bit
Function	Logical-OR for bit variables
Description	Set the carry flag if the Boolean value is a logical 1; leave the carry in its current state otherwise. A slash ( / ) preceding the operand in the assembly language indicates that the logical complement of the addressed bit is used as the source value, but the source bit itself is not affected. No other flags are affected.
Example	Set the carry flag if and only if P1.0 = 1, ACC. 7 = 1, or OV = 0: MOV C,P1.0 ;LOAD CARRY WITH INPUT PIN P10 ORL C,ACC.7 ;OR CARRY WITH THE ACC. BIT 7 ORL C,/OV ;OR CARRY WITH THE INVERSE OF OV.
Variants	ORL C,bit ORL C,/bit

Instruction	ORL C,bit
Bytes	2
Cycles	2
Encoding	01110010 bit_address
Operation	C = C OR (bit)
Flags Affected	C AC F0 RS1 RS0 OV P
Example	ORL C, 22h
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction	ORL C,/bit
Bytes	2
Cycles	2
Encoding	1 0 1 0 0 0 0 0 bit_address
Operation	C = C OR NOT (bit)
Flags Affected	C AC F0 RS1 RS0 OV P
Example	ORL C, /22h
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

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Related topics:
8051 Logical Operation Instructions   |   8051 ANL Instruction   |   8051 XRL Instruction   |   8051 CLR Instruction   |   8051 CPL Instruction   |   8051 RL Instruction   |   8051 RR Instruction   |   8051 RLC Instruction   |   8051 RRC Instruction   |   8051 SWAP Instruction

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List of topics: 8051

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