Complement
| Instruction | CPL A |
|---|---|
| Function | Complement Accumulator |
| Bytes | 1 |
| Cycles | 1 |
| Encoding | 1 1 1 1 0 1 0 0 |
| Operation | A = NOT A |
| Description | CPL A logically complements each bit of the Accumulator (one’s complement). Bits which previously contained a 1 are changed to a 0 and vice-versa. No flags are affected. A slash ( / ) preceding the operand in the assembly language indicates that the logical complement of the bit. |
| Flags Affected | C AC F0 RS1 RS0 OV P |
| Example | The Accumulator contains 5CH (01011100B). The following instruction, CPL A leaves the Accumulator set to 0A3H (10100011B). |
| Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold | |
| Instruction | CPL bit |
|---|---|
| Function | Complement bit |
| Bytes | 2 |
| Cycles | 1 |
| Encoding | 1 0 1 1 0 0 1 0 bit_address |
| Operation | (bit) = 0 |
| Description | CPL bit complements the bit variable specified. A bit that had been a 1 is changed to 0 and vice-versa. No other flags are affected. CLR can operate on the carry or any directly addressable bit. A slash ( / ) preceding the operand in the assembly language indicates that the logical complement of the bit. Note: When this instruction is used to modify an output pin, the value used as the original data is read from the output data latch, not the input pin. |
| Flags Affected | C AC F0 RS1 RS0 OV P |
| Example | Port 1 has previously been written with 5BH (01011101B). The following instruction sequence, CPL P1.1 CPL P1.2 leaves the port set to 5BH (01011011B). |
| Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold | |
| Instruction | CPL C |
|---|---|
| Function | Complement Carry Flag |
| Bytes | 1 |
| Cycles | 1 |
| Encoding | 1 0 1 1 0 0 1 1 |
| Operation | C = NOT C |
| Description | CPL C logically complement Carry Flag |
| Flags Affected | C AC F0 RS1 RS0 OV P |
| Example | The carry flag contains 1B. The following instruction, CPL C leaves the carry flag set to 0B. |
| Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold | |
Related topics:
8051 Logical Operation Instructions | 8051 ANL Instruction | 8051 ORL Instruction | 8051 XRL Instruction | 8051 CLR Instruction | 8051 RL Instruction | 8051 RR Instruction | 8051 RLC Instruction | 8051 RRC Instruction | 8051 SWAP Instruction
List of topics: 8051
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