Absolute Jump
| Instruction | AJMP addr11 |
|---|---|
| Function | Absolute Jump |
| Bytes | 2 |
| Cycles | 2 |
| Encoding | A10 A9 A8 0 0 0 0 1 A7...A0 |
| Operation | PC = PC + 2 PC10-0 = A10-0 |
| Description | AJMP transfers program execution to the indicated address, which is formed at run-time by concatenating the high-order five bits of the PC (after incrementing the PC twice), opcode bits 7 through 5, and the second byte of the instruction. The destination must therfore be within the same 2 K block of program memory as the first byte of the instruction following AJMP. |
| Flags Affected | C AC F0 RS1 RS0 OV P |
| Example | The label JMPADR is at program memory location 0123H. The following instruction, AJMP JMPADR is at location 0345H and loads the PC with 0123H. |
| Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold | |
Related topics:
8051 Program Branching Instructions | 8051 ACALL Instruction | 8051 LCALL Instruction | 8051 RET Instruction | 8051 RETI Instruction | 8051 JMP Instruction | 8051 LJMP Instruction | 8051 SJMP Instruction | 8051 JZ Instruction | 8051 JNZ Instruction | 8051 CJNE Instruction | 8051 DJNZ Instruction | 8051 NOP Instruction
List of topics: 8051
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