## Wednesday, March 2, 2016

### 8051 SUBB Instruction

Subtract with Borrow

Instruction SUBB A,src-byte Subtract with Borrow SUBB subtracts the indicated variable and the carry flag together from the Accumulator, leaving the result in the Accumulator. SUBB sets the carry (borrow) flag if a borrow is needed for bit 7 and clears C otherwise. (If C was set before executing a SUBB instruction, this indicates that a borrow was needed for the previous step in a multiple-precision subtraction, so the carry is subtracted from the Accumulator along with the source operand.) AC is set if a borrow is needed for bit 3 and cleared otherwise. OV is set if a borrow is needed into bit 6, but not into bit 7, or into bit 7, but not bit 6. When subtracting signed integers, OV indicates a negative number produced when a negative value is subtracted from a positive value, or a positive result when a positive number is subtracted from a negative number. The source operand allows four addressing modes: register, direct, register-indirect, or immediate. The Accumulator holds 0C9H (11001001B), register 2 holds 54H (01010100B), and the carry flag is set. The instruction, SUBB A,R2 will leave the value 74H (01110100B) in the accumulator, with the carry flag and AC cleared but OV set. Notice that 0C9H minus 54H is 75H. The difference between this and the above result is due to the carry (borrow) flag being set before the operation. If the state of the carry is not known before starting a single or multiple-precision subtraction, it should be explicitly cleared by CLR C instruction SUBB A,Rn SUBB A,direct address SUBB A,@Ri SUBB A, #immediate data

Instruction SUBB A,Rn 1 1 1 0 0 1 1 n n n A = A - C - Rn C AC F0 RS1 RS0 OV P SUBB A, R5 Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction SUBB A,direct address 2 1 1 0 0 1 0 1 0 1 A7...A0 A = A - C - (direct) C AC F0 RS1 RS0 OV P SUBB A, 44h Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction SUBB A,@Ri 1 1 1 0 0 1 0 1 1 i A = A - C - (Ri) C AC F0 RS1 RS0 OV P SUBB A, @R1 Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction SUBB A, #immediate data 2 1 1 0 0 1 0 1 0 0 D7...D0 A = A - C - immediate data C AC F0 RS1 RS0 OV P SUBB A, #03h Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Related topics:
8051 Arithmetic Operation Instructions   |   8051 ADD Instruction   |   8051 ADDC Instruction   |   8051 INC Instruction   |   8051 DEC Instruction   |   8051 MUL Instruction   |   8051 DIV Instruction   |   8051 DA Instruction

List of topics: 8051