Wednesday, March 2, 2016

8051 XCHD Instruction

Exchange Digit

InstructionXCHD A,@Ri
FunctionExchange Digit
Bytes1
Cycles1
Encoding1 1 0 1 0 1 1 i
OperationA3-0 swap (Ri)3-0
DescriptionXCHD exchanges the low-order nibble of the Accumulator (bits 3 through 0), generally representing a hexadecimal or BCD digit, with that of the internal RAM location indirectly addressed by the specified register. The high-order nibbles (bits 7-4) of each register are not affected. No flags are affected.
Flags AffectedC AC F0 RS1 RS0 OV P
ExampleR0 contains the address 20H. The Accumulator holds the value 36H (00110110B). Internal RAM location 20H holds the value 75H (01110101B). The following instruction,
XCHD A,@R0
leaves RAM location 20H holding the value 76H (01110110B) and 35H (00110101B) in the Accumulator.
Bytes: Number of bytes required to encode the instruction.
Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051.
Encoding: Lists the byte encoding for the instruction.
Operation: Lists, step-by-step, the operations performed by the instruction.
Flags Affected: are highlighted in Bold



Related topics:
8051 Data Transfer Instructions   |   8051 MOV Instruction   |   8051 MOVC Instruction   |   8051 MOVX Instruction   |   8051 PUSH Instruction   |   8051 POP Instruction   |   8051 XCH Instruction

List of topics: 8051

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