Arithmetic Operations
- A, Acc: Accumulator
- B: B special function register
- C: Carry flag in PSW
- Rn: Register R7-R0 of the currently selected Register Bank.
- dir: 8-bit internal data location’s address. This could be an Internal Data RAM location (0-127) or a SFR [i.e., I/O port, control register, status register, etc. (128-255)]. Direct Addressing Mode.
- @Ri : 8-bit internal data RAM location (0-255) addressed indirectly through register R1or R0. Indirect Addressing Mode.
- #data: 8-bit constant included in instruction. Immediate Addressing Mode.
- #data 16: 16-bit constant included in instruction. Immediate Addressing Mode.
- addr 16: 16-bit destination address. Used by LCALL and LJMP. A branch can be anywhere within the 64K byte Program Memory address space. Long Addressing Mode.
- addr 11: 11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2K byte page of program memory as the first byte of the following instruction. Absolute Addressing Mode.
- rel: Signed (two’s complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127 bytes relative to first byte of the following instruction. Relative Addressing Mode.
- bit: Direct Addressed bit in Internal Data RAM or Special Function Register 1B: 1 byte
2B: 2 byte
3B: 3 byte
1C: 1 cycle
2C: 2 cycles
4C: 4 cycles
P: oscillator period
| Mnemonic | Description | |
|---|---|---|
| ADD | A,Rn | Add register to Accumulator [1B,1C,12P] |
| ADD | A,direct | Add direct byte to Accumulator [2B,1C,12P] |
| ADD | A,@Ri | Add indirect RAM to Accumulator [1B,1C,12P] |
| ADD | A,#data | Add immediate data to Accumulator [2B,1C,12P] |
| ADDC | A,Rn | Add register to Accumulator with Carry [1B,1C,12P] |
| ADDC | A,direct | Add direct byte to Accumulator with Carry [2B,1C,12P] |
| ADDC | A,@Ri | Add indirect RAM to Accumulator with Carry [1B,1C,12P] |
| ADDC | A,#data | Add immediate data to Acc with Carry [2B,1C,12P] |
| SUBB | A,Rn | Subtract Register from Acc with borrow [1B,1C,12P] |
| SUBB | A,direct | Subtract direct byte from Acc with borrow [2B,1C,12P] |
| SUBB | A,@Ri | Subtract indirect RAM from ACC with borrow [1B,1C,12P] |
| SUBB | A,#data | Subtract immediate data from Acc with borrow [2B,1C,12P] |
| INC | A | Increment Accumulator [1B,1C,12P] |
| INC | Rn | Increment register [1B,1C,12P] |
| INC | direct | Increment direct byte [2B,1C,12P] |
| INC | @Ri | Increment indirect RAM [1B,1C,12P] |
| DEC | A | Decrement Accumulator [1B,1C,12P] |
| DEC | Rn | Decrement register [1B,1C,12P] |
| DEC | direct | Decrement direct byte [2B,1C,12P] |
| DEC | @Ri | Decrement indirect RAM [1B,1C,12P] |
| INC | DPTR | Increment Data Pointer [1B,2C,24P] |
| MUL | AB | Multiply A & B [1B,4C,48P] |
| DIV | AB | Divide A by B [1B,4C,48P] |
| DA | A | Decimal Adjust Accumulator [1B,1C,12P] |
Addition
Register A (the accumulator) is used to hold the result of any addition operation. Carry, Auxiliary Carry and Overflow flags in the PSW register are affected by the various addition operations.
ADD A, #25h ; Adds the number 25h to A, putting sum in A
ADD A, R3 ; Adds the register R3 value to A, putting sum in A
ADDC A, #55h ; Add contents of A, the number 55h, the carry bit and put the sum in A
ADDC A, R4 ; Add the contents of A, the register R4, the carry bit and put the sum in A.
Subtraction
Subtraction can be achieved using 2’s complement arithmetic. The accumulator, register A, will contain the result (difference) of the subtraction operation. The C (carry) flag is treated as a borrow flag.
SUBB A, #55d ; Subtract the number 55 (decimal) and the C flag from A and put the result in A.
SUBB A, R6 ; Subtract R6 the C flag from A and put the result in A.
SUBB A, 58h ; Subtract the number in RAM location 58h and the C flag From A and put the result in A.
Increment/Decrement
The increment (INC) instruction has the effect of simply adding a binary 1 to a number while a decrement (DEC) instruction has the effect of subtracting a binary 1 from a number. The DPTR register cannot be decremented using a DEC instruction.
INC R7 ; Increment register R7
INC A ; Increment A
INC @R1 ; Increment the number which is the content of the address in R1
DEC A ; Decrement register A
DEC 43h ; Decrement the number in RAM address 43h
INC DPTR ; Increment the DPTR register
Multiply / Divide
The 8051 supports 8-bit multiplication and division. For the MUL or DIV instructions the A
and B registers must be used and only unsigned numbers are supported.
MUL AB ; Multiply A by B. The resulting product resides in registers A and B, the low-order byte is in A and the high order byte is in B.
DIV AB ; A is divided by B. The remainder is put in register B and the integer part of the quotient is put in register A.
Decimal Adjust
The 8051 performs all arithmetic in binary numbers (i.e. it does not support BCD arithmetic). If two BCD numbers are added then the result can be adjusted by using the DA, decimal adjust, instruction:
DA A ; Decimal adjust A following the addition of two BCD numbers.
Related topics:
8051 Instruction Set Overview | 8051 Instruction Cycle | 8051 Machine Cycle | 8051 Instruction Set Summary | 8051 Logical Operation Instructions | 8051 Data Transfer Instructions | 8051 Boolean Variable Manipulation Instructions | 8051 Program Branching Instructions | 8051 Instruction Opcode | 8051 Instructions that Affect Flag Settings | 8051 Instructions and Examples
List of topics: 8051
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