8051 Instruction Opcode

Opcode in Hexadecimal & Binary

• A, Acc: Accumulator
• B: B special function register
• C: Carry flag in PSW
• Rn: Register R7-R0 of the currently selected Register Bank.
• dir: 8-bit internal data location’s address. This could be an Internal Data RAM location (0-127) or a SFR [i.e., I/O port, control register, status register, etc. (128-255)]. Direct Addressing Mode.
• @Ri : 8-bit internal data RAM location (0-255) addressed indirectly through register R1or R0. Indirect Addressing Mode.
• #data: 8-bit constant included in instruction. Immediate Addressing Mode.
• #data 16: 16-bit constant included in instruction. Immediate Addressing Mode.
• addr 16: 16-bit destination address. Used by LCALL and LJMP. A branch can be anywhere within the 64K byte Program Memory address space. Long Addressing Mode.
• addr 11: 11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2K byte page of program memory as the first byte of the following instruction. Absolute Addressing Mode.
• rel: Signed (two’s complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127 bytes relative to first byte of the following instruction. Relative Addressing Mode.
• bit: Direct Addressed bit in Internal Data RAM or Special Function Register
1B: 1 byte
2B: 2 byte
3B: 3 byte
1C: 1 cycle
2C: 2 cycles
4C: 4 cycles
P: oscillator Period

Hex	Binary	Bytes	Instruction
00	00000000	1	NOP
01	00000001	2	AJMP code addr (addr11)
02	00000010	3	LJMP code addr (addr16)
03	00000011	1	RR A
04	00000100	1	INC A
05	00000101	2	INC data addr (direct)
06	00000110	1	INC @R0
07	00000111	1	INC @R1
08	00001000	1	INC R0
09	00001001	1	INC R1
0A	00001010	1	INC R2
0B	00001011	1	INC R3
0C	00001100	1	INC R4
0D	00001101	1	INC R5
0E	00001110	1	INC R6
0F	00001111	1	INC R7
10	00010000	3	JBC bit addr, code addr (rel)
11	00010001	2	ACALL code addr (addr11)
12	00010010	3	LCALL code addr (addr16)
13	00010011	1	RRC A
14	00010100	1	DEC A
15	00010101	2	DEC data addr (direct)
16	00010110	1	DEC @R0
17	00010111	1	DEC @R1
18	00011000	1	DEC R0
19	00011001	1	DEC R1
1A	00011010	1	DEC R2
1B	00011011	1	DEC R3
1C	00011100	1	DEC R4
1D	00011101	1	DEC R5
1E	00011110	1	DEC R6
1F	00011111	1	DEC R7
20	00100000	3	JB bit addr, code addr (rel)
21	00100001	2	AJMP code addr (addr11)
22	00100010	1	RET
23	00100011	1	RL A
24	00100100	2	ADD A, #data (immediate)
25	00100101	2	ADD A,data addr (direct)
26	00100110	1	ADD A,@R0
27	00100111	1	ADD A,@R1
28	00101000	1	ADD A,R0
29	00101001	1	ADD A,R1
2A	00101010	1	ADD A,R2
2B	00101011	1	ADD A,R3
2C	00101100	1	ADD A,R4
2D	00101101	1	ADD A,R5
2E	00101110	1	ADD A,R6
2F	00101111	1	ADD A,R7
30	00110000	3	JNB bit addr ,code addr (rel)
31	00110001	2	ACALL code addr (addr11)
32	00110010	1	RETI
33	00110011	1	RLC A
34	00110100	2	ADDC A, #data (immediate)
35	00110101	2	ADDC A,data addr (direct)
36	00110110	1	ADDC A,@R0
37	00110111	1	ADDC A,@R1
38	00111000	1	ADDC A,R0
39	00111001	1	ADDC A,R1
3A	00111010	1	ADDC A,R2
3B	00111011	1	ADDC A,R3
3C	00111100	1	ADDC A,R4
3D	00111101	1	ADDC A,R5
3E	00111110	1	ADDC A,R6
3F	00111111	1	ADDC A,R7
40	01000000	2	JC code addr (rel)
41	01000001	2	AJMP code addr (addr11)
42	01000010	2	ORL data addr (direct) ,A
43	01000011	3	ORL data addr (direct) ,#data (immediate)
44	01000100	2	ORL A, #data (immediate)
45	01000101	2	ORL A,data addr (direct)
46	01000110	1	ORL A,@R0
47	01000111	1	ORL A,@R1
48	01001000	1	ORL A,R0
49	01001001	1	ORL A,R1
4A	01001010	1	ORL A,R2
4B	01001011	1	ORL A,R3
4C	01001100	1	ORL A,R4
4D	01001101	1	ORL A,R5
4E	01001110	1	ORL A,R6
4F	01001111	1	ORL A,R7
50	01010000	2	JNC code addr (rel)
51	01010001	2	ACALL code addr (addr11)
52	01010010	2	ANL data addr (direct) ,A
53	01010011	3	ANL data addr(direct) ,#data(immediate)
54	01010100	2	ANL A, #data (immediate)
55	01010101	2	ANL A,data addr (direct)
56	01010110	1	ANL A,@R0
57	01010111	1	ANL A,@R1
58	01011000	1	ANL A,R0
59	01011001	1	ANL A,R1
5A	01011010	1	ANL A,R2
5B	01011011	1	ANL A,R3
5C	01011100	1	ANL A,R4
5D	01011101	1	ANL A,R5
5E	01011110	1	ANL A,R6
5F	01011111	1	ANL A,R7
60	01100000	2	JZ code addr (rel)
61	01100001	2	AJMP code addr (addr11)
62	01100010	2	XRL data addr (direct) ,A
63	01100011	3	XRL data addr (direct) ,#data (immediate)
64	01100100	2	XRL A, #data (immediate)
65	01100101	2	XRL A,data addr (direct)
66	01100110	1	XRL A,@R0
67	01100111	1	XRL A,@R1
68	01101000	1	XRL A,R0
69	01101001	1	XRL A,R1
6A	01101010	1	XRL A,R2
6B	01101011	1	XRL A,R3
6C	01101100	1	XRL A,R4
6D	01101101	1	XRL A,R5
6E	01101110	1	XRL A,R6
6F	01101111	1	XRL A,R7
70	01110000	2	JNZ code addr (rel)
71	01110001	2	ACALL code addr (addr11)
72	01110010	2	ORL C,bit addr
73	01110011	1	JMP @A+DPTR
74	01110100	2	MOV A,#data (immediate)
75	01110101	3	MOV data addr(direct), #data (immediate)
76	01110110	2	MOV @R0,#data (immediate)
77	01110111	2	MOV @R1,#data (immediate)
78	01111000	2	MOV R0,#data (immediate)
79	01111001	2	MOV R1,#data (immediate)
7A	01111010	2	MOV R2,#data (immediate)
7B	01111011	2	MOV R3,#data (immediate)
7C	01111100	2	MOV R4,#data (immediate)
7D	01111101	2	MOV R5,#data (immediate)
7E	01111110	2	MOV R6,#data (immediate)
7F	01111111	2	MOV R7,#data (immediate)
80	10000000	2	SJMP code addr (rel)
81	10000001	2	AJMP code addr (addr11)
82	10000010	2	ANL C,bit addr
83	10000011	1	MOVC A,@A+PC
84	10000100	1	DIV AB
85	10000101	3	MOV data addr (direct) ,data addr (direct)
86	10000110	2	MOV data addr (direct) ,@R0
87	10000111	2	MOV data addr (direct) ,@R1
88	10001000	2	MOV data addr (direct) ,R0
89	10001001	2	MOV data addr (direct) ,R1
8A	10001010	2	MOV data addr (direct) ,R2
8B	10001011	2	MOV data addr (direct) ,R3
8C	10001100	2	MOV data addr (direct) ,R4
8D	10001101	2	MOV data addr (direct) ,R5
8E	10001110	2	MOV data addr (direct) ,R6
8F	10001111	2	MOV data addr (direct) ,R7
90	10010000	3	MOV DPTR,#data16 (immediate)
91	10010001	2	ACALL code addr (addr11)
92	10010010	2	MOV bit addr,C
93	10010011	2	MOVC A,@A+DPTR
94	10010100	2	SUBB A,#data (immediate)
95	10010101	1	SUBB A,data addr (direct)
96	10010110	1	SUBB A,@R0
97	10010111	1	SUBB A,@R1
98	10011000	1	SUBB A,R0
99	10011001	1	SUBB A,R1
9A	10011010	1	SUBB A,R2
9B	10011011	1	SUBB A,R3
9C	10011100	1	SUBB A,R4
9D	10011101	1	SUBB A,R5
9E	10011110	1	SUBB A,R6
9F	10011111	1	SUBB A,R7
A0	10100000	2	ORL C,/bit addr
A1	10100001	2	AJMP code addr (addr11)
A2	10100010	2	MOV C,bit addr
A3	10100011	1	INC DPTR
A4	10100100	1	MUL AB
A5	10100101		reserved
A6	10100110	2	MOV @R0,data addr (direct)
A7	10100111	2	MOV @R1,data addr (direct)
A8	10101000	2	MOV R0,data addr (direct)
A9	10101001	2	MOV R1,data addr (direct)
AA	10101010	2	MOV R2,data addr (direct)
AB	10101011	2	MOV R3,data addr (direct)
AC	10101100	2	MOV R4,data addr (direct)
AD	10101101	2	MOV R5,data addr (direct)
AE	10101110	2	MOV R6,data addr (direct)
AF	10101111	2	MOV R7,data addr (direct)
B0	10110000	2	ANL C,/bit addr
B1	10110001	2	ACALL code addr (addr11)
B2	10110010	2	CPL bit addr
B3	10110011	1	CPL C
B4	10110100	3	CJNE A,#data (immediate),code addr (rel)
B5	10110101	3	CJNE A,data addr (direct),code addr (rel)
B6	10110110	3	CJNE @R0,#data (immediate),code addr (rel)
B7	10110111	3	CJNE @R1,#data (immediate),code addr (rel)
B8	10111000	3	CJNE R0,#data (immediate),code addr (rel)
B9	10111001	3	CJNE R1,#data (immediate),code addr (rel)
BA	10111010	3	CJNE R2,#data (immediate),code addr (rel)
BB	10111011	3	CJNE R3,#data (immediate),code addr (rel)
BC	10111100	3	CJNE R4,#data (immediate),code addr (rel)
BD	10111101	3	CJNE R5,#data (immediate),code addr (rel)
BE	10111110	3	CJNE R6,#data (immediate),code addr (rel)
BF	10111111	3	CJNE R7,#data (immediate),code addr (rel)
C0	11000000	2	PUSH data addr (direct)
C1	11000001	2	AJMP code addr (addr11)
C2	11000010	2	CLR bit addr
C3	11000011	1	CLR C
C4	11000100	1	SWAP A
C5	11000101	2	XCH A,data addr (direct)
C6	11000110	1	XCH A,@R0
C7	11000111	1	XCH A,@R1
C8	11001000	1	XCH A,R0
C9	11001001	1	XCH A,R1
CA	11001010	1	XCH A,R2
CB	11001011	1	XCH A,R3
CC	11001100	1	XCH A,R4
CD	11001101	1	XCH A,R5
CE	11001110	1	XCH A,R6
CF	11001111	1	XCH A,R7
D0	11010000	2	POP data addr (direct)
D1	11010001	2	ACALL code addr (addr11)
D2	11010010	2	SETB bit addr
D3	11010011	1	SETB C
D4	11010100	1	DA A
D5	11010101	3	DJNZ data addr (direct),code addr (rel)
D6	11010110	1	XCHD A,@R0
D7	11010111	1	XCHD A,@R1
D8	11011000	2	DJNZ R0,code addr (rel)
D9	11011001	2	DJNZ R1,code addr (rel)
DA	11011010	2	DJNZ R2,code addr (rel)
DB	11011011	2	DJNZ R3,code addr (rel)
DC	11011100	2	DJNZ R4,code addr (rel)
DD	11011101	2	DJNZ R5,code addr (rel)
DE	11011110	2	DJNZ R6,code addr (rel)
DF	11011111	2	DJNZ R7,code addr (rel)
E0	11100000	1	MOVX A,@DPTR
E1	11100001	2	AJMP code addr (addr11)
E2	11100010	1	MOVX A,@R0
E3	11100011	1	MOVX A,@R1
E4	11100100	1	CLR A
E5	11100101	2	MOV A,data addr (direct)
E6	11100110	1	MOV A,@R0
E7	11100111	1	MOV A,@R1
E8	11101000	1	MOV A,R0
E9	11101001	1	MOV A,R1
EA	11101010	1	MOV A,R2
EB	11101011	1	MOV A,R3
EC	11101100	1	MOV A,R4
ED	11101101	1	MOV A,R5
EE	11101110	1	MOV A,R6
EF	11101111	1	MOV A,R7
F0	11110000	1	MOVX @DPTR,A
F1	11110001	2	ACALL code addr (addr11)
F2	11110010	1	MOVX @R0,A
F3	11110011	1	MOVX @R1,A
F4	11110100	1	CPL A
F5	11110101	2	MOV data addr (direct),A
F6	11110110	1	MOV @R0,A
F7	11110111	1	MOV @R1,A
F8	11111000	1	MOV R0,A
F9	11111001	1	MOV R1,A
FA	11111010	1	MOV R2,A
FB	11111011	1	MOV R3,A
FC	11111100	1	MOV R4,A
FD	11111101	1	MOV R5,A
FE	11111110	1	MOV R6,A
FF	11111111	1	MOV R7,A

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Related topics:
8051 Instruction Set Overview   |   8051 Instruction Cycle   |   8051 Machine Cycle   |   8051 Instruction Set Summary   |   8051 Arithmetic Operation Instructions   |   8051 Logical Operation Instructions   |   8051 Data Transfer Instructions   |   8051 Boolean Variable Manipulation Instructions   |   8051 Program Branching Instructions   |   8051 Instructions that Affect Flag Settings   |   8051 Instructions and Examples

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List of topics: 8051

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