Thursday, March 31, 2016

8051 ADC Interfacing

Analog-to-digital converters are among the most widely used devices for data acquisition. We need an analog-to-digital converter to translate the analog signals to digital numbers so that the microcontroller can read and process them. The ADC chips are either parallel or serial. In parallel ADC, we have 8 or more pins dedicated to bringing out the binary data, but in serial ADC we have only one pin for data out.

8051 ADC Interfacing - Parallel

The following are the general pins in ADC.
D0 – D7: The digital data output pins. The converted data is accessed only when CS = 0 and RD is forced low.

CS: Chip select is an active low input used to activate the ADC chip.

RD: This is an input signal and is active low. RD is used to get the converted data out of the ADC chip. RD pin is also referred to as output enable (OE).

WR: This is an active low input used to inform the ADC to start the conversion process.

INTR: This is an output pin and is active low. It is a normally high pin and when the conversion is finished, it goes low to signal the CPU that the converted data is ready to be picked up.

Reading Data from ADC:
Make CS = 0 and send a low-to-high pulse to pin WR to start the conversion.

Keep monitoring the INTR pin. If INTR is low, the conversion is finished and we can go to the next step. If INTR is high, keep polling until it goes low.

After the INTR has become low, we make CS = 0 and send a high-to-low pulse to the RD pin to get the data out of the ADC chip.

; main program
ORG 0H
MOV P1, #0FFH ; make P1 as input port
CS BIT P2.4
READ BIT P2.5
WRITE BIT P2.6
INTR BIT P2.7
CLR CS ; CS = 0, chip enable
SETB INTR ; INTR = 1, clear end of conversion
BACK: CLR WRITE ; WR = 0, clear start conversion
SETB WRITE ; WR = 1 to start conversion
HERE: JB INTR, HERE ; wait for end of conversion
CLR READ ; conversion finished. Enable read
MOV A, P1 ; move data to accumulator
ACALL CONVERSION ; convert hex to acsii
SETB READ ; prepare for next round
SJMP BACK
; convert hex to dec (00 - FF to 000 - 255) and then to ASCII
ORG 300H
RAM_ADDR EQU 40H
ASCII_RESULT EQU 50H
CONVERSION:
HEX2DEC:
MOV R0, #RAM_ADDR
MOV B, #10
DIV AB ; divide by 10
MOV @R0, B ; save lower digit
INC R0
MOV B, #10
DIV AB
MOV @R0, B ; save the next digit
INC R0
MOV @R0, A ; save last digit
DEC2ASCII:
MOV R0, #RAM_ADDR
MOV R1, #ASCII_RESULT
MOV R2, #3 ; digit count
REPEAT: MOV A, @R0
ORL A, #30H ; make it an ASCII digit
MOV @R1, A ; save it
INC R0
INC R1
DJNZ R2, REPEAT
RET
END


Serial ADC:
CS: Chip select is an active low input used to select the chip.

SCLK: Serial clock input. SCLK is used to bring data out and send in the control byte, one bit at a time.

DOUT: Serial data out. The digital data is clocked out one bit at a time on the H-to-L edge (falling edge) of SCLK.

DIN: Serial data in the control byte is clocked in one bit at a time on the L-to-H edge (rising edge) of SCLK.

STRB: Serial strobe output. In internal clock mode this indicates end-of-conver-sion. It goes high when the conversion is complete.

A control byte is fed into the ADC serially one bit at a time via the DIN pin with the help of SCLK. The control byte must be sent in with the MSB (most significant bit) going in first. The MSB of the control byte is high to indicate the start of the control byte.

When the last bit of the control byte is sent in the conversion starts, and STRB goes low. The end-of-conversion state is indicated by STRB going high. We can either wait or monitor STRB before we get the digital data out of the ADC chip.

The 8-bit converted digital data is brought out of the ADC via the DOUT pin using SCLK. As we apply a negative-edge pulse to the SCLK pin, the 8-bit digital data is read out one bit at a time with the MSB (D7) coming out first. The STRB goes high to indicate that the conversion is finished.

; program to adc data serially
ORG 0H
CS BIT P2.0
SCLK BIT P2.1
DIN BIT P2.2
DOUT BIT P2.3
MAIN: MOV A, #80H ; MSB = 1
MOV R3, #8 ; 8-bits
CLR CS ; CS = 0
; sending in control byte
SEND_BYTE:
RLC A ; give a bit to carry flag
MOV DIN, C ; send a bit to DIN
CLR SCLK ; SCLK low to high pulse
ACALL DELAY
SETB SCLK
ACALL DELAY
DJNZ R3, SEND_BYTE ; repeat for all 8-bits
SETB CS ; deselect ADC, start conversion
CLR SCLK ; SCLK = 0 during conversion
SETB DOUT ; make it an input
; reading data out
CLR CS ; CS = 0
SETB SCLK
ACALL DELAY
CLR SCLK ; first high to low
ACALL DELAY
MOV R3, #8
MOV A, #0H ; clear accumulator
READ_DATA:
SETB SCLK
ACALL DELAY
CLR SCLK ; high to low pulse to get bit out
ACALL DELAY
MOV C, DOUT ; move bit to carry flag
RLC A ; bring in the bit
DJNZ R3, READ_DATA ; read 8-bits
SETB CS ; cs = 1
MOV P1, A
SJMP MAIN
; some delay
DELAY: MOV R6, #50
HERE2: MOV R7, #255
HERE: DJNZ R7, HERE ; stay until R7 = 0
DJNZ R6, HERE2 ; stay until R6 = 0
RET
END



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List of topics: 8051

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