8051 DJNZ Instruction

Decrement and Jump if Not Zero

Instruction	DJNZ byte,rel-addr
Function	Decrement and Jump if Not Zero
Description	DJNZ decrements the location indicated by 1, and branches to the address indicated by the second operand if the resulting value is not zero. An original value of 00H underflows to 0FFH. No flags are affected. The branch destination is computed by adding the signed relative-displacement value in the last instruction byte to the PC, after incrementing the PC to the first byte of the following instruction. The location decremented may be a register or directly addressed byte. Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins.
Example	Internal RAM locations 40H, 50H, and 60H contain the values 01H, 70H, and 15H, respectively. The following instruction sequence, DJNZ 40H,LABEL_1 DJNZ 50H,LABEL_2 DJNZ 60H,LABEL_3 causes a jump to the instruction at label LABEL_2 with the values 00H, 6FH, and 15H in the three RAM locations. The first jump was not taken because the result was zero. This instruction provides a simple way to execute a program loop a given number of times or for adding a moderate time delay (from 2 to 512 machine cycles) with a single instruction. The following instruction sequence, MOV R2, # 8 TOGGLE: CPL P1.7 DJNZ R2,TOGGLE toggles P1.7 eight times, causing four output pulses to appear at bit 7 of output Port 1. Each pulse lasts three machine cycles; two for DJNZ and one to alter the pin.
Variants	DJNZ Rn, relative address DJNZ direct address, relative address

Instruction	DJNZ Rn, relative address
Bytes	2
Cycles	2
Encoding	1 1 0 1 1 n n n A7...A0
Operation	PC = PC + 2 Rn = Rn - 1 IF Rn <> 0 PC = PC + relative address
Flags Affected	C AC F0 RS1 RS0 OV P
Example	DJNZ R6, LABEL
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

Instruction	DJNZ direct address, relative address
Bytes	2
Cycles	2
Encoding	1 1 0 1 0 1 1 1 DA7...DA0 RA7...RA0
Operation	PC = PC + 2 (direct address) = (direct address) - 1 IF (direct address) <> 0 PC = PC + relative address
Flags Affected	C AC F0 RS1 RS0 OV P
Example	DJNZ 40h, LABEL
Bytes: Number of bytes required to encode the instruction. Cycles: Number of instruction cycles required to execute the instruction. Note that there are 12 oscillator cycles to one instruction cycle on a standard 8051. Encoding: Lists the byte encoding for the instruction. Operation: Lists, step-by-step, the operations performed by the instruction. Flags Affected: are highlighted in Bold

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Related topics:
8051 Program Branching Instructions   |   8051 ACALL Instruction   |   8051 LCALL Instruction   |   8051 RET Instruction   |   8051 RETI Instruction   |   8051 JMP Instruction   |   8051 AJMP Instruction   |   8051 LJMP Instruction   |   8051 SJMP Instruction   |   8051 JZ Instruction   |   8051 JNZ Instruction   |   8051 CJNE Instruction   |   8051 NOP Instruction

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List of topics: 8051

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