The 8051 has two external hardware interrupts. They are located on pins P3.2 and P3.3 of port 3, respectively. There are two types of activation for the external hardware interrupts: (1) level triggered, and (2) edge triggered.
In the level-triggered mode, INTO and INT1 pins are normally high (just like all I/O port pins) and if a low-level signal is applied to them, it triggers the interrupt. Upon reset the 8051 makes INTO and INT1 low-level triggered interrupts.In the following program, a low level on INT 1 toggles the pin P1.3.
In the level-triggered mode, INTO and INT1 pins are normally high (just like all I/O port pins) and if a low-level signal is applied to them, it triggers the interrupt. Upon reset the 8051 makes INTO and INT1 low-level triggered interrupts.In the following program, a low level on INT 1 toggles the pin P1.3.
ORG 0H LJMP MAIN ; bypass ISR
; ISR for INT1
ORG 0013H SETB P1.3 MOV R3, #255 BACK : DJNZ R3, BACK CLR P1.3 RETI
; main program
ORG 30H MAIN : MOV IE, #10000100B SJMP HERE SJMP ; stay here until interrupted END
Related topics:
8051 Loop | 8051 Delay | 8051 IO Port Programming | 8051 Timer Programming | 8051 Counter | 8051 Serial Port Programming | 8051 Programming Timer Interrupt | 8051 Programming Serial Interrupt
List of topics: 8051
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